file copy -force i:/sim_lib/MODELSIM10_5/vivado22_2/modelsim.ini ./modelsim.ini 

vlib work
vmap work work

vlog -work work -incr ../../src/sim_examp_axi_ddr4_top.v

vlog -work work -incr ../../ip/clk_top/clk_top_sim_netlist.v
vlog -work work -incr ../../ip/axi_bram/axi_bram_sim_netlist.v

vcom -work work  -93 \
                ../../ip/ddr4_0/bd_0/ip/ip_0/sim/bd_9054_microblaze_I_0.vhd \
                ../../ip/ddr4_0/bd_0/ip/ip_1/sim/bd_9054_rst_0_0.vhd \
                ../../ip/ddr4_0/bd_0/ip/ip_2/sim/bd_9054_ilmb_0.vhd \
                ../../ip/ddr4_0/bd_0/ip/ip_3/sim/bd_9054_dlmb_0.vhd \
                ../../ip/ddr4_0/bd_0/ip/ip_4/sim/bd_9054_dlmb_cntlr_0.vhd \
                ../../ip/ddr4_0/bd_0/ip/ip_5/sim/bd_9054_ilmb_cntlr_0.vhd

vlog -work work -incr -mfcu  +incdir+../../ip/ddr4_0/ip_1/rtl/map \
                             +incdir+../../ip/ddr4_0/rtl/ip_top \
                             +incdir+../../ip/ddr4_0/rtl/cal \
                             ../../ip/ddr4_0/bd_0/ip/ip_6/sim/bd_9054_lmb_bram_I_0.v 

vcom -work work  -93 \
                ../../ip/ddr4_0/bd_0/ip/ip_7/sim/bd_9054_second_dlmb_cntlr_0.vhd \
                ../../ip/ddr4_0/bd_0/ip/ip_8/sim/bd_9054_second_ilmb_cntlr_0.vhd

vlog -work work -incr -mfcu  +incdir+../../ip/ddr4_0/ip_1/rtl/map \
                             +incdir+../../ip/ddr4_0/rtl/ip_top \
                             +incdir+../../ip/ddr4_0/rtl/cal \
                             ../../ip/ddr4_0/bd_0/ip/ip_9/sim/bd_9054_second_lmb_bram_I_0.v

vcom -work work  -93 \
                ../../ip/ddr4_0/bd_0/ip/ip_10/sim/bd_9054_iomodule_0_0.vhd

vlog -work work -incr -mfcu  +incdir+../../ip/ddr4_0/ip_1/rtl/map \
                             +incdir+../../ip/ddr4_0/rtl/ip_top \
                             +incdir+../../ip/ddr4_0/rtl/cal \
                             ../../ip/ddr4_0/bd_0/sim/bd_9054.v \
                             ../../ip/ddr4_0/ip_0/sim/ddr4_0_microblaze_mcs.v 

vlog -work work -incr -mfcu -sv +incdir+../../ip/ddr4_0/ip_1/rtl/map \
                             +incdir+../../ip/ddr4_0/rtl/ip_top \
                             +incdir+../../ip/ddr4_0/rtl/cal \
                             ../../ip/ddr4_0/ip_1/rtl/phy/ddr4_0_phy_ddr4.sv \
                             ../../ip/ddr4_0/ip_1/rtl/phy/ddr4_phy_v2_2_xiphy_behav.sv \
                             ../../ip/ddr4_0/ip_1/rtl/phy/ddr4_phy_v2_2_xiphy.sv \
                             ../../ip/ddr4_0/ip_1/rtl/iob/ddr4_phy_v2_2_iob_byte.sv \
                             ../../ip/ddr4_0/ip_1/rtl/iob/ddr4_phy_v2_2_iob.sv \
                             ../../ip/ddr4_0/ip_1/rtl/clocking/ddr4_phy_v2_2_pll.sv \
                             ../../ip/ddr4_0/ip_1/rtl/xiphy_files/ddr4_phy_v2_2_xiphy_tristate_wrapper.sv \
                             ../../ip/ddr4_0/ip_1/rtl/xiphy_files/ddr4_phy_v2_2_xiphy_riuor_wrapper.sv \
                             ../../ip/ddr4_0/ip_1/rtl/xiphy_files/ddr4_phy_v2_2_xiphy_control_wrapper.sv \
                             ../../ip/ddr4_0/ip_1/rtl/xiphy_files/ddr4_phy_v2_2_xiphy_byte_wrapper.sv \
                             ../../ip/ddr4_0/ip_1/rtl/xiphy_files/ddr4_phy_v2_2_xiphy_bitslice_wrapper.sv \
                             ../../ip/ddr4_0/ip_1/rtl/ip_top/ddr4_0_phy.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_wtr.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_ref.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_rd_wr.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_periodic.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_group.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_ecc_merge_enc.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_ecc_gen.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_ecc_fi_xor.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_ecc_dec_fix.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_ecc_buf.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_ecc.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_ctl.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_cmd_mux_c.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_cmd_mux_ap.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_arb_p.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_arb_mux_p.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_arb_c.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_arb_a.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_act_timer.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc_act_rank.sv \
                             ../../ip/ddr4_0/rtl/controller/ddr4_v2_2_mc.sv \
                             ../../ip/ddr4_0/rtl/ui/ddr4_v2_2_ui_wr_data.sv \
                             ../../ip/ddr4_0/rtl/ui/ddr4_v2_2_ui_rd_data.sv \
                             ../../ip/ddr4_0/rtl/ui/ddr4_v2_2_ui_cmd.sv \
                             ../../ip/ddr4_0/rtl/ui/ddr4_v2_2_ui.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_axi_ar_channel.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_axi_aw_channel.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_axi_b_channel.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_axi_cmd_arbiter.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_axi_cmd_fsm.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_axi_cmd_translator.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_axi_fifo.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_axi_incr_cmd.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_axi_r_channel.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_axi_w_channel.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_axi_wr_cmd_fsm.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_axi_wrap_cmd.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_a_upsizer.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_axi.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_axi_register_slice.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_axi_upsizer.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_axic_register_slice.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_carry_and.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_carry_latch_and.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_carry_latch_or.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_carry_or.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_command_fifo.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_comparator.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_comparator_sel.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_comparator_sel_static.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_r_upsizer.sv \
                             ../../ip/ddr4_0/rtl/axi/ddr4_v2_2_w_upsizer.sv \
                             ../../ip/ddr4_0/rtl/axi_ctrl/ddr4_v2_2_axi_ctrl_addr_decode.sv \
                             ../../ip/ddr4_0/rtl/axi_ctrl/ddr4_v2_2_axi_ctrl_read.sv \
                             ../../ip/ddr4_0/rtl/axi_ctrl/ddr4_v2_2_axi_ctrl_reg_bank.sv \
                             ../../ip/ddr4_0/rtl/axi_ctrl/ddr4_v2_2_axi_ctrl_reg.sv \
                             ../../ip/ddr4_0/rtl/axi_ctrl/ddr4_v2_2_axi_ctrl_top.sv \
                             ../../ip/ddr4_0/rtl/axi_ctrl/ddr4_v2_2_axi_ctrl_write.sv \
                             ../../ip/ddr4_0/rtl/clocking/ddr4_v2_2_infrastructure.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_cal_xsdb_bram.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_cal_write.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_cal_wr_byte.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_cal_wr_bit.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_cal_sync.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_cal_read.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_cal_rd_en.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_cal_pi.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_cal_mc_odt.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_cal_debug_microblaze.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_cal_cplx_data.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_cal_cplx.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_cal_config_rom.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_cal_addr_decode.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_cal_top.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_cal_xsdb_arbiter.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_cal.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_chipscope_xsdb_slave.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_v2_2_dp_AB9.sv \
                             ../../ip/ddr4_0/rtl/ip_top/ddr4_0_ddr4.sv \
                             ../../ip/ddr4_0/rtl/ip_top/ddr4_0_ddr4_mem_intfc.sv \
                             ../../ip/ddr4_0/rtl/cal/ddr4_0_ddr4_cal_riu.sv \
                             ../../ip/ddr4_0/rtl/ip_top/ddr4_0.sv \
                             ../../ip/ddr4_0/tb/ddr4_0_microblaze_mcs_0.sv

vlog -work work -incr -mfcu +incdir+../../../../../bd/bd_top/ipshared/ec67/hdl \
                            ../../bd/bd_top/ip/bd_top_xbar_0/sim/bd_top_xbar_0.v \
                            ../../bd/bd_top/sim/bd_top.v \
                            ../../bd/bd_top/ip/bd_top_auto_us_0/sim/bd_top_auto_us_0.v \
                            ../../bd/bd_top/ip/bd_top_auto_cc_0/sim/bd_top_auto_cc_0.v \
                            ../../bd/bd_top/ip/bd_top_auto_cc_1/sim/bd_top_auto_cc_1.v \
                            ../../bd/bd_top/ip/bd_top_auto_cc_2/sim/bd_top_auto_cc_2.v \
                            ../../bd/bd_top/ip/bd_top_auto_ds_0/sim/bd_top_auto_ds_0.v 


vlog -work work -incr -sv ../tb/ddr4_tb.sv

vlog -work work -incr -mfcu -sv +define+DDR4_8G_X16 ../tb/ddr4_mdl/arch_package.sv \
                                                    ../tb/ddr4_mdl/proj_package.sv \
                                                    ../tb/ddr4_mdl/interface.sv \
                                                    ../tb/ddr4_mdl/ddr4_model.svp \
                                                    ../tb/ddr4_mdl/ddr4_mdl.sv

vlog -work work -incr -sv ../tb/axi4_mdl/axi4_mdl.sv

vlog -work work ../tb/glbl.v

vsim \
-voptargs="+acc" \
-L generic_baseblocks_v2_1_0 \
-L axi_infrastructure_v1_1_0 \
-L axi_register_slice_v2_1_27 \
-L axi_data_fifo_v2_1_26 \
-L axi_crossbar_v2_1_28 \
-L axi_protocol_converter_v2_1_27\
-L axi_clock_converter_v2_1_26 \
-L axi_dwidth_converter_v2_1_27 \
-L microblaze_v11_0_10 \
-L lib_cdc_v1_0_2 \
-L proc_sys_reset_v5_0_13 \
-L lmb_v10_v3_0_12 \
-L lmb_bram_if_cntlr_v4_0_21 \
-L blk_mem_gen_v8_4_5 \
-L iomodule_v3_1_8 \
-L secureip \
-L unisims_ver \
-L unimacro_ver \
-L unifast_ver \
-L simprims_ver \
-L xpm \
-L xilinx_vip \
-L fifo_generator_v13_2_7 \
glbl ddr4_tb

add log -r /*

do wave.do

run -all




